1. Field of the Invention
The invention relates to a method for fabricating ferroelectric integrated circuits that effectively removes hydrogen barrier layers from ferroelectric devices.
2. Statement of the Problem
Ferroelectric compounds possess favorable characteristics for use in nonvolatile integrated circuit memories. See Miller, U.S. Pat. No. 5,046,043. A ferroelectric device, such as a capacitor, is useful as a nonvolatile memory when it possesses desired electronic characteristics, such as high residual polarization, good coercive field, high fatigue resistance, and low leakage current. Lead-containing ABO.sub.3 type ferroelectric oxides such as PZT (lead titanate zirconate) and PLZT (lanthanum lead titanate zirconate) have been studied for practical use in integrated circuits. Layered superlattice material oxides have also been studied for use in integrated circuits. See Watanabe, U.S. Pat. No. 5,434,102. Layered superlattice compounds exhibit characteristics in ferroelectric memories that are orders of magnitude superior to those of PZT and PLZT compounds. While prototypes of ferroelectric memories have been made successfully with the layered superlattice compounds, there is as yet no manufacturing process for making memories using either the ABO.sub.3 type oxides or the layered superlattice material compounds with the desired electronic characteristics economically and in commercial quantities. One reason, among others, for the lack of economical commercial processes for the fabrication of high quality ferroelectric integrated circuits is that the oxide compounds are susceptible to reduction by hydrogen during hydrogen annealing. Hydrogen annealing is a common step during CMOS integrated circuit memory fabrication and results in degradation of some important ferroelectric properties. This is especially true for the layered superlattice compounds, which are complex, layered oxides that are especially prone to degradation by hydrogen.
A typical ferroelectric memory device in an integrated circuit contains a semiconductor substrate and a metal-oxide semiconductor field-effect transistor (MOSFET) in electrical contact with a ferroelectric device, usually a ferroelectric capacitor. A ferroelectric capacitor typically contains a ferroelectric thin film located between a first or bottom electrode and a second or top electrode, the electrodes typically containing platinum. During manufacture of the circuit, the MOSFET is subjected to conditions causing defects in the silicon substrate. For example, the manufacturing process usually includes high energy steps, such as ion-mill etching and plasma etching. Defects also arise during heat treatment for crystallization of the ferroelectric thin film at relatively high temperatures, often in the range 500.degree.-900.degree. C. As a result, numerous defects are generated in the single crystal structure of the semiconductor silicon substrate, leading to deterioration in the electronic characteristics of the MOSFET.
To restore the silicon properties of the MOSFET/CMOS, the manufacturing process typically includes a hydrogen annealing step, in which defects such as dangling bonds are eliminated by utilizing the reducing property of hydrogen. Various techniques have been developed to effect the hydrogen annealing, such as H.sub.2 -gas heat treatment in ambient conditions. Conventionally, hydrogen treatments are conducted between 350.degree. and 550.degree. C., typically around 450.degree. C. for a time period of about 60 minutes. In addition, there are several other integrated circuit fabrication processes that expose the integrated circuit to hydrogen, often at elevated temperatures, such as CVD processes for depositing metals, and growth of silicon dioxide from silane. During processes that involve hydrogen, the hydrogen diffuses through the top electrode and the side of the capacitor to the ferroelectric thin film and reduces the oxides contained in the ferroelectric material. The absorbed hydrogen also metallizes the surface of the ferroelectric thin film. The adhesivity of the ferroelectric thin film to the upper electrode is lowered by the chemical change taking place at the interface. Alternatively, the upper electrode is pushed up by the oxygen gas, water, and other products of the oxidation-reduction reactions taking place. As a result of these effects, the electronic properties of the capacitor are degraded, and peeling is likely to take place at the interface between the top electrode and the ferroelectric thin film. These problems are acute in ferroelectric memories containing layered superlattice compounds because these oxide compounds are particularly complex and prone to degradation by hydrogen-reduction.
Prior art teaches the use of hydrogen barrier layers to protect the ferroelectric capacitor from the deleterious effects of hydrogen. Depending on the uses and manufacturing conditions of the integrated circuit, it is sometimes desirable or necessary to remove the hydrogen barrier after the hydrogen annealing step. Some barrier materials, such as silicon nitride are virtually nonconductive, and their presence can interfere with electrical contacts to the capacitor and other circuit elements. Titanium nitride, on the other hand, is relatively conductive, but it is less conductive than typical wiring and electrode materials. Also, titanium nitride and other barrier materials typically are partially oxidized by oxygen contaminants during deposition or by other oxidizing conditions. The oxides in the barrier layer act to diminish the electrical conductivity. Furthermore, if the hydrogen barrier layer is conductive, it is desirable to remove it completely from the vicinity of the ferroelectric thin film to avoid electrical shorting within the capacitor. For these reasons it is often desirable to remove titanium nitride from ferroelectric devices after hydrogen annealing.
Two general etching techniques are used conventionally to remove such material from integrated circuits: dry, ion-mill etching and wet, chemical etching.
Etching in baths of wet chemicals has several desirable characteristics. It is relatively simple. It typically has high selectivity, often in excess of 10:1, with respect to both other layers and to photoresist. On the other hand, except in special cases where certain crystal lattice planes are attacked preferentially, wet etching is slow. Furthermore, it is isotropic, that is, it attacks equally in all directions. The etching chemicals begin to attack the side walls as soon as some vertical etching has taken place. This results in a loss of material beneath the mask. The undercut roughly equals the thickness of the film being etched. This can be an acceptable disadvantage if the minimum feature sizes in the circuit are an order of magnitude greater than the thickness of the thin film etched. But, as integrated circuits become more dense, the width of the circuit devices approaches film thickness. Furthermore, even when the device is relatively wide compared to film thickness, undercutting can lead to circuit shorting and other problems. Therefore, isotropic etching is often not suitable in a fabrication process.
The other category, the dry etching techniques, includes ion-mill etching, and ionized gas and ionized plasma methods. In ion milling methods, inert gases such as neon or argon are employed. A flux of ions is accelerated toward the surface to be etched, and the collisions at the surface result in its etching. Ion-mill etching is physical, not chemical, so it cannot take advantage of differences in chemical composition to etch some chemical compounds selectively over others. Also, it does not remove all traces of material. For RIE methods, reactive gases are used. Although gases are good insulators, it is possible to ionize a portion of the atoms or molecules by the application of sufficient direct current (DC) or radio frequency (RF) voltage, especially at reduced pressures. In standard reactive ion etching (RIE), reactive gases (such as Cl.sub.2 and CCl.sub.3 F) are used. The reactive gas plays a dual role; it both sputter-etches and reacts with the material, producing a reaction product that is volatile so that it can be pumped out. Because the etching medium is a flux of ions directed towards the substrate, etching is anisotropic, that is, preferential in the direction normal to the surface. RIE is efficient because it is rapid and anisotropic. But, RIE also does not remove all traces of material.
3. Solution to the Problem
The invention solves the above problems by providing a method for fabricating ferroelectric elements in integrated circuits that removes a hydrogen barrier efficiently and completely.
The invention provides a method of providing a substrate, forming a thin film of metal oxide material on the substrate, forming a hydrogen barrier layer directly over at least a portion of the thin film of metal oxide material, then performing a dry etch to remove a significant portion of said hydrogen barrier layer; and then performing a wet, chemical etch to remove remnants of the hydrogen barrier layer. Preferably the dry etch is an ion-mill etching process. Preferably the wet etch comprises using a solution containing NH.sub.4 OH, H.sub.2 O.sub.2, and H.sub.2 O. Preferably the hydrogen barrier layer comprises a nitride of titanium. In another application, the hydrogen barrier layer comprises titanium. In another application, the hydrogen barrier layer comprises a nitride of silicon.
In an application of the invention, the metal oxide material comprises an oxide compound containing at least two metals. Preferably at least one of the metals is present in an excess amount.
Preferably the thin film of metal oxide material comprises a layered superlattice compound. Preferably the layered superlattice compound comprises strontium, bismuth, and at least one of the metals from the group consisting of tantalum and niobium. Preferably the layered superlattice compound contains an excess amount of at least one of the metals selected from the group consisting of bismuth and niobium.
An application of the invention is use of the metal oxide material as part of a ferroelectric capacitor or part of a FET.
An embodiment of the invention further provides for forming a bottom electrode over which the thin film of metal oxide material is formed; and forming a top electrode above the thin film of metal oxide material prior to forming the hydrogen barrier layer. The method can further include the step of etching at least a portion of said hydrogen barrier layer to expose a portion of said top electrode.
In another embodiment of the invention, the hydrogen barrier layer comprises at least two chemical elements, and a chemical reaction is performed with at least one of said chemical elements. Preferably two of the chemical elements are titanium and nitrogen. In another embodiment, two of the chemical elements are silicon and nitrogen. Preferably the chemical reaction is an oxidation reaction. Preferably the oxidation reaction is performed using hydrogen peroxide.
An embodiment of the invention is a method in which hydrogen barrier layer is formed comprising at least one free chemical element, and a chemical reaction is performed with at least one free chemical element. Preferably a free chemical element is titanium. In another embodiment, a free chemical element is silicon. Preferably the chemical reaction with the free element is an oxidation reaction. Preferably the oxidation reaction is performed using hydrogen peroxide.
Another aspect of the invention is removing a hydrogen barrier layer by using the combination of a dry etch step followed by a wet, chemical etching step that is selective to the barrier layer without significantly affecting the ferroelectric.
A key aspect of the invention is the use of an etch that is selective to free metal, such as titanium, rather than the barrier layer compound itself, e.g. titanium nitride. It has been found that there is always some free titanium in titanium nitride. This titanium is oxidized by H.sub.2 O.sub.2 in H.sub.2 O, and the oxidized titanium weakens the titanium nitride structure so that it washes away easily.
Another aspect of the invention is that H.sub.2 O.sub.2 oxidizes free titanium and has excellent selectivity between titanium and layered superlattice compounds.